Apple M1, In-Depth Review
π½ CPU : 8 ARM cores = 4 high perf + 4 low power , 5nm, TSMC
π₯GPU Comparable with GTX 1650
πDRAM : 3DStack HBM, lower latency and power consumption
π Read more in Notion
π½ CPU : 8 ARM cores = 4 high perf + 4 low power , 5nm, TSMC
π₯GPU Comparable with GTX 1650
πDRAM : 3DStack HBM, lower latency and power consumption
π Read more in Notion
π’Quantum Annealing Simulation and FPGAs
While pure-play quantum computing (QC) gets most of the QC-related attention, thereβs also been steady progress adapting quantum methods for select use on classical computers.
World interest in Quantum Computing warms up the interest in Quantum-Inspired algorithms, among them Quantum Annealing Simulation(QA).
QA has nothing in common with qubits and Ρryocooler but offers a fast optimization method for complex but structured non-convex landscape.
Before moving further, we recommend you to read first about the Simulated Annealing because QA is a kind of extension of classical SA. Read here and here.
Analytical and numerical evidence suggests that quantum annealing outperforms simulated annealing under certain conditions See this short and clear Introduction to Quantum inspired Optimization
QA can be simulated on a computer using quantum Monte Carlo (QMC), but computational complexity scales up too fast. That's where application specific hardware comes out on scene
π¦FPGA
OpenCLβbased design of an FPGA accelerator for quantum annealing simulation
FPGA accelerator for QA simulations designed using Intel OpenCL HLS and achieved 6 times the multicore CPU implementation.
π¦¨Why not GPU?
None of these accelerators are suitable for complete graphs where every node has an interaction with all the other nodes. It is very difficult to accelerate QMC algorithm for complete graphs using GPUs due to the lack of SIMD operations and high data dependency
πFurther Reading:
πD-Wave Two -commercially available computer for QA simulation
πQuantum-inspired algorithms in practice
βοΈMicrosoft announced that Toshiba Bifurcation Machine
will be available through the Azure Quantum platform.
While pure-play quantum computing (QC) gets most of the QC-related attention, thereβs also been steady progress adapting quantum methods for select use on classical computers.
World interest in Quantum Computing warms up the interest in Quantum-Inspired algorithms, among them Quantum Annealing Simulation(QA).
QA has nothing in common with qubits and Ρryocooler but offers a fast optimization method for complex but structured non-convex landscape.
Before moving further, we recommend you to read first about the Simulated Annealing because QA is a kind of extension of classical SA. Read here and here.
Analytical and numerical evidence suggests that quantum annealing outperforms simulated annealing under certain conditions See this short and clear Introduction to Quantum inspired Optimization
QA can be simulated on a computer using quantum Monte Carlo (QMC), but computational complexity scales up too fast. That's where application specific hardware comes out on scene
π¦FPGA
OpenCLβbased design of an FPGA accelerator for quantum annealing simulation
FPGA accelerator for QA simulations designed using Intel OpenCL HLS and achieved 6 times the multicore CPU implementation.
π¦¨Why not GPU?
None of these accelerators are suitable for complete graphs where every node has an interaction with all the other nodes. It is very difficult to accelerate QMC algorithm for complete graphs using GPUs due to the lack of SIMD operations and high data dependency
πFurther Reading:
πD-Wave Two -commercially available computer for QA simulation
πQuantum-inspired algorithms in practice
βοΈMicrosoft announced that Toshiba Bifurcation Machine
will be available through the Azure Quantum platform.
Wikipedia
Quantum annealing
method for finding solutions to combinatorial optimisation problems and ground states of glassy systems using quantum fluctuations
PDP-11π
https://www.economist.com/technology-quarterly/2020/06/11/the-cost-of-training-machines-is-becoming-a-problem The growing demand for computing power has fuelled a boom in chip design and specialised devices that can perform the calculations used in AI efficiently.β¦
Graphcore raises $222M at $2.7B valuation
https://techcrunch-com.cdn.ampproject.org/c/s/techcrunch.com/2020/12/28/ai-chipmaker-graphcore-raises-222m-at-a-2-77b-valuation-and-puts-an-ipo-in-its-sights/amp/
https://techcrunch-com.cdn.ampproject.org/c/s/techcrunch.com/2020/12/28/ai-chipmaker-graphcore-raises-222m-at-a-2-77b-valuation-and-puts-an-ipo-in-its-sights/amp/
https://www.tenstorrent.com/press/
Tenstorrent, a hardware start-up developing next generation computers, announces the addition of industry veteran Jim Keller as President, CTO, and board member.
Tenstorrent, a hardware start-up developing next generation computers, announces the addition of industry veteran Jim Keller as President, CTO, and board member.
π FPGA comes back. Titanium FPGAs from EFINIX are focused on the edge application and promises unbeatable per-Watt performance
βοΈ[pdf] Hardware Accelerator of CNN by Yann Le Cun, father of Deeo Learning revolution
πΊ [youTube] 20min introduction video from Intel about what are the FPGAs and what sort of applications can you use it for
π± [plumerAI] Yet another ML Hardware startup
keeps growing and explains why binarized neural networks do the job with less resources
π° [youTube] Bonus! The lecture from yesterday by professor Onur Mutlu, ETH, about GPU architecture.
π»π»π»
This channel is back from hibernation and more reviews will come soon :)
βοΈ[pdf] Hardware Accelerator of CNN by Yann Le Cun, father of Deeo Learning revolution
πΊ [youTube] 20min introduction video from Intel about what are the FPGAs and what sort of applications can you use it for
π± [plumerAI] Yet another ML Hardware startup
keeps growing and explains why binarized neural networks do the job with less resources
π° [youTube] Bonus! The lecture from yesterday by professor Onur Mutlu, ETH, about GPU architecture.
π»π»π»
This channel is back from hibernation and more reviews will come soon :)
PDP-11π
The latest paper by David Patterson & Google TPU team reveals details of the world most efficient and one of the most powerful supercomputers for DNN Acceleration - TPU v3. The one which was used to train BERT. We recommend that you definitely read the fullβ¦
ππΌGoogle finally released TPU v4, it will be avaliable for customers later this year.
π₯΄The previous v3 version was unveiled in 2018 and the v4 is claimed to be twice as fast.
π½TPU v4 combines in a 4096 chips sumercomputer that reaches 1 exaFLOPs (10**18) of performance
Read more on [hpcwire] and watch the video Google I/O β21
π₯΄The previous v3 version was unveiled in 2018 and the v4 is claimed to be twice as fast.
π½TPU v4 combines in a 4096 chips sumercomputer that reaches 1 exaFLOPs (10**18) of performance
Read more on [hpcwire] and watch the video Google I/O β21
π The Hardware Lottery π°
by Sarah Hooker, Google Brain [ACM]
- The very first computer hardware was extremely focused on solving one particular problem - numerical differentiation or polynomial models. In the 1960s IBM invented the concept of Instruction Set and made migration between hardware easier for software developers. Till the 2010s we have been living in the world of general-purpose hardware - CPUs.
- Computer Science Ideas win or lose not because one superior one to another, but because some of them did not have the suitable hardware to be implemented in. Back Propagation Algorithm, the key algorithm that made the deep learning revolution possible, was invented independently in 1963, 1976, 1988 and finally applied to CNN in 1989. However, it was only three decades later that deep neural networks were widely accepted as a promising research direction and the significant result was achieved with GPUs, that could run massive parallel computations.
- Today hardware pendulum is swinging back to domain-specific hardware like it was the CPU invention
- Hardware should not remain a limiting factor for the breakthrough ideas in AI research. Hardware and Software should be codesigned for the SOTA algorithms. Algorithm developers need a deeper understanding of the computer platforms.
read also here
by Sarah Hooker, Google Brain [ACM]
- The very first computer hardware was extremely focused on solving one particular problem - numerical differentiation or polynomial models. In the 1960s IBM invented the concept of Instruction Set and made migration between hardware easier for software developers. Till the 2010s we have been living in the world of general-purpose hardware - CPUs.
- Computer Science Ideas win or lose not because one superior one to another, but because some of them did not have the suitable hardware to be implemented in. Back Propagation Algorithm, the key algorithm that made the deep learning revolution possible, was invented independently in 1963, 1976, 1988 and finally applied to CNN in 1989. However, it was only three decades later that deep neural networks were widely accepted as a promising research direction and the significant result was achieved with GPUs, that could run massive parallel computations.
- Today hardware pendulum is swinging back to domain-specific hardware like it was the CPU invention
- Hardware should not remain a limiting factor for the breakthrough ideas in AI research. Hardware and Software should be codesigned for the SOTA algorithms. Algorithm developers need a deeper understanding of the computer platforms.
read also here
dl.acm.org
The hardware lottery | Communications of the ACM
After decades of incentivizing the isolation of hardware, software, and algorithm development, the catalysts for closer collaboration are changing the paradigm.
PDP-11π
π The Hardware Lottery π° by Sarah Hooker, Google Brain [ACM] - The very first computer hardware was extremely focused on solving one particular problem - numerical differentiation or polynomial models. In the 1960s IBM invented the concept of Instructionβ¦
Hey folks,
That was a long period of silence here, but I'll try to breathe a new life to this channel I'll do my best to post more frequently and not only ML hardware, but also about Zero Knowledge Proof accelerators, some areas on computer architecture, trading infrastructure and HPC
Here is a video for today β what is Zero Knowledge Proof (ZKP)
ZKP is a way for proofer to convince a verifier, who has X and Y, that given for given function F
But I find an explanation with a revealing of puffin absolutely genius in both in simplicity and clarity.
πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨
πͺ¨πͺ¨πͺ¨π§πͺ¨πͺ¨
πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨
Enjoy the video
Computer Scientist Explains ZKP in 5 Levels of Difficulty | WIRED
That was a long period of silence here, but I'll try to breathe a new life to this channel I'll do my best to post more frequently and not only ML hardware, but also about Zero Knowledge Proof accelerators, some areas on computer architecture, trading infrastructure and HPC
Here is a video for today β what is Zero Knowledge Proof (ZKP)
ZKP is a way for proofer to convince a verifier, who has X and Y, that given for given function F
F(x,w)=y
, without revealing w
to verifier. But I find an explanation with a revealing of puffin absolutely genius in both in simplicity and clarity.
πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨
πͺ¨πͺ¨πͺ¨π§πͺ¨πͺ¨
πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨πͺ¨
Enjoy the video
Computer Scientist Explains ZKP in 5 Levels of Difficulty | WIRED
YouTube
Computer Scientist Explains One Concept in 5 Levels of Difficulty | WIRED
Computer scientist Amit Sahai, PhD, is asked to explain the concept of zero-knowledge proofs to 5 different people; a child, a teen, a college student, a grad student, and an expert. Using a variety of techniques, Amit breaks down what zero-knowledge proofsβ¦